CO224 Computer Architecture
Course Code
CO224
Course Title
Computer Architecture
Credits
3
Course Type
CORE
Aims/Objectives
To teach the elements of a computer and how they are organized and explain how instructions of a program will be executed by the microprocessor and how performance can be evaluated and enhanced so as to widen the vision of students in understanding programs behaviour on a computer system.
Intended Learning Outcomes (ILOs)
Knowledge:
At the end of this course, a student will be able to;
- Represent and manipulate numbers in different formats.
- Describe the elements of a computer such as microprocessor, cache, memory and system buses.
- Explain the memory hierarchy and how it operates.
- Describe multiprocessor systems, SIMD, GPU and Vector and elaborate their importance.
- Design and analyse single-, multi-cycle and pipelined processors.
- Analyse issues related to system performance.
Skill:
At the end of this course, a student will be able to;
- Design architectural solutions and describe designs using an HDL.
- Use simulator to test a designed processor.
Attitude:
- Gain appreciation of computer systems and how they are built and tested using tools.
Textbooks and References
- David Patterson, John L. Hennessy, Computer Organization and Design; The Hardware/Software Interface, 4th Edition
| Topic | Time Allocated / hours | |||
|---|---|---|---|---|
| L | T | P | A | |
|
Overview Difference between Computer Architecture and Computer Organization; Role of computer architecture in Computer Engineering |
1 | - | - | - |
|
Fundamentals of computer architecture Von Neumann machine organization, Instruction types and addressing modes, Subroutine call and return mechanisms, Instruction decoding and execution; Registers and register files; I/O techniques and interrupts |
2 | - | - | - |
|
Computer arithmetic Integer arithmetic; Multiplication, Division, Significance of range,precision and accuracy; Floating-point arithmetic; Standard methods of representation, Addition, Subtraction, Multiplication, Division;Conversion between integer and floating-point numbers |
3 | 1 | - | - |
|
CPU organization Implementation of the von Neumann machine; Control and data paths,single vs. Multiple bus datapaths; Instruction set architecture,Implementing instructions; Register transfer notation, Conditional and unconditional transfers, ALU control; Control unit; hardwired vs. Microprogrammed realizations; Arithmetic units for multiplication and division |
5 | 1 | 4 | 4 |
|
Pipelining Introduction to instruction level parallelism, Overview of pipelining, Pipelined data paths and control, Pipeline hazards; structural, data and control hazards, forwarding, stalls; Reducing the effect of hazards |
4 | - | 2 | - |
|
Memory hierarchies Memory systems hierarchy, Electronic, magnetic and optical technologies; Main memory organization, latency, cycle-time, bandwidth and interleaving; Cache memories; Address mapping, line size, replacement and write-back policies; Virtual memory, page faults, TLBs, protection |
5 | 1 | 4 | 3 |
|
Interfacing and communication I/O fundamentals; Types and characteristics of I/O devices, handshaking, buffering; Buses; types of buses, synchronous and asynchronous buses, bus masters and slaves, bus arbitration, bus standards; programmed I/O, interrupt driven I/O, Interrupt structures; vectored and prioritized, interrupt overhead; Direct memory access |
4 | - | 4 | 3 |
|
Performance issues Metrics for computer performance, clock rate, MIPS, Cycles per instruction, benchmarks, limitations of performance metrics |
2 | 1 | - | - |
|
Multiprocessors Introduction to shared memory multiprocessors, clusters, message passing systems, Flynns classification |
3 | - | - | - |
|
Total (hours) |
29 | 4 | 14 | 10 |
L = Lectures, T = Tutorial classes, P = Practical classes, A = Homework Assignments
| Assessment | Percentage Marks |
|---|---|
| Practicals | 20 |
| Assignments | 20 |
| Mid-Exam | 20 |
| End-Exam | 40 |
Grades Distribution: 2019 - E15
Last Update: 03/02/2024
|
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