CO2070 Computer Architecture

Introduction to computer architecture Review of Von Neumann machine concept and computer systems organization, history of computer technology and current trends. Performance evaluation Metrics of computer performance, response time vs throughput, CPU time vs elapsed time, clock rate, cycles per instruction, benchmarks, design tradeoffs. Instruction Set Architecture Review of programmer model and ISA, instruction encoding, operand types (immediate, register, memory), instruction types (data processing, data transfer and flow control), register conventions, addressing modes, software interrupts, comparison of CISC and RISC programmer models. CPU organization Implementation of the Von Neumann machine using a specified ISA, datapath and control, register file, arithmetic and logic unit, control unit, instruction fetching and decoding, execution of instructions in a single-cycle datapath, timing and clocking, critical path and performance considerations, implementation of a single-cycle CPU using Verilog HDL behavioral modeling. Pipelined datapath and control Introduction to pipelining and instruction level parallelism, datapath and control in a pipelined CPU using specified ISA, pipeline hazards and stalls, hazard mitigation techniques (data forwarding, code scheduling, branch prediction), clocking and performance considerations. Memory sub-system Memory layout, overview of memory technologies, latency and performance, memory hierarchy and principles of locality, caching and cache control, data blocks placement and address mapping, write policies, replacement policies, cache performance, multi-level caches, virtual memory and address translation using page tables, page faults, translation look-aside buffer, secondary storage technologies (disk and flash storage). Interfacing and I/O Overview of interfacing in a computer, bus interconnects (types, signals, synchronization, arbitration), crossbar switch networks, mesh and grid interconnects, I/O fundamentals, programmed vs interrupt driven I/O, direct memory access, systems-on-chip. Multiprocessor systems Parallel processing, shared-memory multiprocessors, uniform memory access and symmetric multiprocessors, cache coherence and bus snooping, non-uniform memory access, directory-based cache coherence, message passing multiprocessors, Flynn’s classification